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thirdparty,net.mbedtls: update mbedtls to latest compatible version v3.3.0 (#21118)

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Turiiya 2024-03-28 07:46:21 +01:00 • committed by GitHub
parent cb402a3340
commit 64a336932c
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156 changed files with 16293 additions and 4396 deletions
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50
thirdparty/mbedtls/library/bn_mul.h vendored
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@ -90,13 +90,29 @@
#if defined(__GNUC__) && \
( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 )
/*
* GCC < 5.0 treated the x86 ebx (which is used for the GOT) as a
* fixed reserved register when building as PIC, leading to errors
* like: bn_mul.h:46:13: error: PIC register clobbered by 'ebx' in 'asm'
*
* This is fixed by an improved register allocator in GCC 5+. From the
* release notes:
* Register allocation improvements: Reuse of the PIC hard register,
* instead of using a fixed register, was implemented on x86/x86-64
* targets. This improves generated PIC code performance as more hard
* registers can be used.
*/
#if defined(__GNUC__) && __GNUC__ < 5 && defined(__PIC__)
#define MULADDC_CANNOT_USE_EBX
#endif
/*
* Disable use of the i386 assembly code below if option -O0, to disable all
* compiler optimisations, is passed, detected with __OPTIMIZE__
* This is done as the number of registers used in the assembly code doesn't
* work with the -O0 option.
*/
#if defined(__i386__) && defined(__OPTIMIZE__)
#if defined(__i386__) && defined(__OPTIMIZE__) && !defined(MULADDC_CANNOT_USE_EBX)
#define MULADDC_X1_INIT \
{ mbedtls_mpi_uint t; \
@ -566,10 +582,20 @@
"andi r7, r6, 0xffff \n\t" \
"bsrli r6, r6, 16 \n\t"
#define MULADDC_X1_CORE \
#if(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
#define MULADDC_LHUI \
"lhui r9, r3, 0 \n\t" \
"addi r3, r3, 2 \n\t" \
"lhui r8, r3, 0 \n\t"
#else
#define MULADDC_LHUI \
"lhui r8, r3, 0 \n\t" \
"addi r3, r3, 2 \n\t" \
"lhui r9, r3, 0 \n\t" \
"lhui r9, r3, 0 \n\t"
#endif
#define MULADDC_X1_CORE \
MULADDC_LHUI \
"addi r3, r3, 2 \n\t" \
"mul r10, r9, r6 \n\t" \
"mul r11, r8, r7 \n\t" \
@ -717,10 +743,10 @@
#define MULADDC_X1_CORE \
".p2align 2 \n\t" \
"ldr.w %[a], [%[in]], #4 \n\t" \
"ldr.w %[b], [%[acc]] \n\t" \
"ldr %[a], [%[in]], #4 \n\t" \
"ldr %[b], [%[acc]] \n\t" \
"umaal %[b], %[carry], %[scalar], %[a] \n\t" \
"str.w %[b], [%[acc]], #4 \n\t"
"str %[b], [%[acc]], #4 \n\t"
#define MULADDC_X1_STOP \
: [a] "=&r" (tmp_a), \
@ -751,14 +777,14 @@
* 2 cycles, while subsequent loads/stores are single-cycle. */
#define MULADDC_X2_CORE \
".p2align 2 \n\t" \
"ldr.w %[a0], [%[in]], #+8 \n\t" \
"ldr.w %[b0], [%[acc]], #+8 \n\t" \
"ldr.w %[a1], [%[in], #-4] \n\t" \
"ldr.w %[b1], [%[acc], #-4] \n\t" \
"ldr %[a0], [%[in]], #+8 \n\t" \
"ldr %[b0], [%[acc]], #+8 \n\t" \
"ldr %[a1], [%[in], #-4] \n\t" \
"ldr %[b1], [%[acc], #-4] \n\t" \
"umaal %[b0], %[carry], %[scalar], %[a0] \n\t" \
"umaal %[b1], %[carry], %[scalar], %[a1] \n\t" \
"str.w %[b0], [%[acc], #-8] \n\t" \
"str.w %[b1], [%[acc], #-4] \n\t"
"str %[b0], [%[acc], #-8] \n\t" \
"str %[b1], [%[acc], #-4] \n\t"
#define MULADDC_X2_STOP \
: [a0] "=&r" (tmp_a0), \