mirrors/v
1
0
Fork 0
mirror of https://github.com/vlang/v.git synced 2025-09-13 22:42:26 +03:00
Code Issues Projects Releases Packages Wiki Activity Actions 13

fix android clang does not support =d constraint

Browse source
This commit is contained in:
kbkpbot 2025-08-08 15:37:01 +08:00
parent 029e1f885e
commit 53dbb562c9
1 changed files with 15 additions and 21 deletions
Download patch file Download diff file Expand all files Collapse all files

36
vlib/math/bits/bits.amd64.v
View file

@ -14,18 +14,16 @@ fn C._udiv128(hi u64, lo u64, y u64, rem &u64) u64
// This function's execution time does not depend on the inputs. // This function's execution time does not depend on the inputs.
@[inline] @[inline]
pub fn mul_64(x u64, y u64) (u64, u64) { pub fn mul_64(x u64, y u64) (u64, u64) {
mut hi := u64(0) mut hi := y
mut lo := u64(0) mut lo := x
$if msvc { $if msvc {
lo = C._umul128(x, y, &hi) lo = C._umul128(x, y, &hi)
} $else { } $else {
asm amd64 { asm amd64 {
mulq rdx mulq rdx
; =d (hi) ; +a (lo)
=a (lo) +d (hi)
; a (x) ; ; cc
d (y)
; cc
} }
} }
return hi, lo return hi, lo
@ -36,8 +34,8 @@ pub fn mul_64(x u64, y u64) (u64, u64) {
// half returned in lo. // half returned in lo.
@[inline] @[inline]
pub fn mul_add_64(x u64, y u64, z u64) (u64, u64) { pub fn mul_add_64(x u64, y u64, z u64) (u64, u64) {
mut hi := u64(0) mut hi := y
mut lo := u64(0) mut lo := x
$if msvc { $if msvc {
lo = C._umul128(x, y, &hi) lo = C._umul128(x, y, &hi)
carry := C._addcarry_u64(0, lo, z, &lo) carry := C._addcarry_u64(0, lo, z, &lo)
@ -47,11 +45,9 @@ pub fn mul_add_64(x u64, y u64, z u64) (u64, u64) {
mulq rdx mulq rdx
addq rax, z addq rax, z
adcq rdx, 0 adcq rdx, 0
; =d (hi) ; +a (lo)
=a (lo) +d (hi)
; a (x) ; r (z)
d (y)
r (z)
; cc ; cc
} }
} }
@ -72,18 +68,16 @@ pub fn div_64(hi u64, lo u64, y1 u64) (u64, u64) {
panic(overflow_error) panic(overflow_error)
} }
mut quo := u64(0) mut quo := lo
mut rem := u64(0) mut rem := hi
$if msvc { $if msvc {
quo = C._udiv128(hi, lo, y, &rem) quo = C._udiv128(hi, lo, y, &rem)
} $else { } $else {
asm amd64 { asm amd64 {
div y div y
; =a (quo) ; +a (quo)
=d (rem) +d (rem)
; d (hi) ; r (y)
a (lo)
r (y)
; cc ; cc
} }
} }